전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AS4SD16M16 데이터시트(PDF) 23 Page - Micross Components

부품명 AS4SD16M16
상세설명  LVTTL- compatible inputs and outputs
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICROSS [Micross Components]
홈페이지  http://www.micross.com
Logo MICROSS - Micross Components

AS4SD16M16 데이터시트(HTML) 23 Page - Micross Components

Back Button AS4SD16M16 Datasheet HTML 19Page - Micross Components AS4SD16M16 Datasheet HTML 20Page - Micross Components AS4SD16M16 Datasheet HTML 21Page - Micross Components AS4SD16M16 Datasheet HTML 22Page - Micross Components AS4SD16M16 Datasheet HTML 23Page - Micross Components AS4SD16M16 Datasheet HTML 24Page - Micross Components AS4SD16M16 Datasheet HTML 25Page - Micross Components AS4SD16M16 Datasheet HTML 26Page - Micross Components AS4SD16M16 Datasheet HTML 27Page - Micross Components Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 52 page
background image
SDRAM
AS4SD16M16
AS4SD16M16
Rev. 2.6 04/13/15
Micross Components reserves the right to change products or specifications without notice.
23
NOTES:
1. This table applies when CKE
n-1 was HIGH and CKEn is HIGH (see Truth Table 2) and after tXSR has been met (if the previ-
ous state was self refresh).
2. This table is bank-specific, except where noted, i.e., the current state is for a specific bank and the commands shown are those
allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle:
The bank has been precharged, and t
RP has been met.
Row Active:
A row in the bank has been activated, and t
RCD has been met. No data bursts/accesses and no
register accesses are in progress.
Read:
A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or been
terminated.
Write:
A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or
been terminated.
4. The following states must not be interrupted by a command issued to the same bank. COMMAND INHIBIT or NOP com-
mands, or allowable commands to the other bank should be issued on any clock edge occurring during these states. Allowable
commands to the other bank are determined by its current state and Truth Table 3, and according to Truth Table 4.
Precharging:
Starts with registration of a PRECHARGE command and ends when t
RP is met. Once tRP is met,
the bank will be in the idle state.
Row Activating:
Starts with registration of an ACTIVE command and ends when t
RCD is met. Once tRCD is met, the
bank will be in the row active state.
Read w/ Auto
Precharge Enabled:
Starts with registration of a READ command with auto precharge enabled and ends when t
RP has
been met. Once t
RP is met, the bank will be in the idle state.
Write w/ Auto
Precharge Enabled:
Starts with registration of a WRITE command with auto precharge enabled and ends when t
RP has
been met. Once t
RP is met, the bank will be in the idle state.
(continued on next page)
TRUTH TABLE 3: CURRENT STATE BANK n, COMMAND TO BANK n1,2,3,4,5,6
CURRENT STATE CS\ RAS\ CAS\ WE\
COMMAND (ACTION)
NOTES
H
X
X
X
COMMAND INHIBIT (NOP/Continue previous operation)
L
H
H
H
NO OPERATION (NOP/Continue previous operation)
L
L
H
H
ACTIVE (Select and active row)
L
L
L
H
AUTO REFRESH
7
LLLL
LOAD MODE REGISTER
7
L
L
H
L
PRECHARGE
11
L
H
L
H
READ (Select column and start READ burst)
10
L
H
L
L
WRITE (Select column and start WRITE burst)
10
L
L
H
L
PRECHARGE (Deactivate row in bank or banks)
8
L
H
L
H
READ (Select column and start new READ burst)
10
L
H
L
L
WRITE (Select column and start WRITE burst)
10
L
L
H
L
PRECHARGE (Truncate READ burst, start PRECHARGE)
8
L
H
H
L
BURST TERMINATE
9
L
H
L
H
READ (Select column and start READ burst)
10
L
H
L
L
WRITE (Select column and start new WRITE burst)
10
L
L
H
L
PRECHARGE (Truncate WRITE burst, start PRECHARGE)
8
L
H
H
L
BURST TERMINATE
9
Write
(Auto Precharge
Disabled)
ANY
Idle
Row Active
Read
(Auto Precharge
Disabled)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com