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Si511 데이터시트(PDF) 21 Page - Silicon Laboratories

부품명 Si511
상세설명  2 to 4 week lead times
PDF  26 Pages
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제조업체  SILABS [Silicon Laboratories]
홈페이지  http://www.silabs.com
Logo SILABS - Silicon Laboratories

Si511 데이터시트(HTML) 21 Page - Silicon Laboratories

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Si510/511
Rev. 1.2
21
10. PCB Land Pattern: 3.2 x 5 mm, 4-pin
Figure 9 illustrates the 3.2 x 5 mm PCB land pattern for the Si510/511. Table 19 lists the values for the dimensions
shown in the illustration.
Figure 9. Si510/511 PCB Land Pattern
Table 19. PCB Land Pattern Dimensions (mm)
Dimension
(mm)
C1
2.60
E2.54
X1
1.35
Y1
1.70
Notes:
General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2.
Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3.
This Land Pattern Design is based on the IPC-7351 guidelines.
4.
All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition
(LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
Solder Mask Design
5.
All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design
6.
A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be
used to assure good solder paste release.
7.
The stencil thickness should be 0.125 mm (5 mils).
8.
The ratio of stencil aperture to land pad size should be 1:1.
Card Assembly
9.
A No-Clean, Type-3 solder paste is recommended.
10.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for
Small Body Components.



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