UU97950

Advance

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

6 of 14

www.unisonic.com.tw

QW-R125-048.a



FUNCTION DESCRIPTIONS (Cont.)

Command transfer method

Issue the Slave Address (01111100 for write mode or 01111101 for read mode) after the start condition is

Generated. Command input follows after the Slave Address. The least significant bit (LSB) of the Slave

Address determines if the operation to be done is Write or Read operation.

The MSB (command or data judgement bit) defines if the succeeding byte is a command or data.

When “Command or data judgement bit”=’1’, the next byte is a command.

When “Command or data judegment bit”=’0’, the nexit byte is display data.

S

Slave address

A

1 Command

A

1 Command

A

0 Command

A

Display

P

Once it enters display data transfer condition, it cannot input any command.

To input command again, please generate the “START condition” again.

If “START condition” or “STOP condition” is inputted in the middle of command transmission, the command

will be cancelled. If the Slave address is continuously inputted following “START condition”, it will be in command

input condition.

Please input “Slave Address” in the first data transmission after “START condition”.

When Slave Address cannot be recongnized in the first data transmission. Acknowledge does not return and

the next transmission will be invalid. When data transmission is in invalid status and the “START condition” is

transmitted again, it will return to valid status.

Write display and transfer method

Write mode happens when R/W bit=’0’

This device has Display Data RAM of 35×8=280bits.

The relationship between data input and display data, DDRAM data and address are as follows.

The 8-bit display data will be stored in the DDRAM. The address to be written is the address specified by

Address Set command, and the address is automatically incremented after every 8-bits of data.

Data can be continuously written in the DDRAM by transmitting data continuously.