P83C266BDR datasheet(81/92 Pages) PHILIPS

81 / 92 page

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22 PINNING CHARACTERIZATION

This chapter describes every pin used in both the SDIP42 and PLCC68 packages.

22.1

Type of packages

SDIP42: for P8XCX66

PLCC68: for Metalink+ applications

Table 91 Explanation of symbols/terms used in Table 92

Table 92 Pin characteristics

SYMBOL/TERM

MEANING

STr

Schmitt trigger

Rpu

pull-up resistor

Rpd

pull-down resistor

high-impedance

original state

the outputs keep the state they had before entering the Idle mode

SYMBOL

TYPE

INPUT LEVEL

OUTPUT TYPE

SLOPE

CONTROL

OUTPUT IN

IDLE MODE

OUTPUT

AFTER RESET

ACTIVE STATE

SW CONTROL

SDIP42

PLCC68

−

1VSS

−−

−

INTD

CMOS + Rpu(1)

−−

−

P5.0

I/O

CMOS

open-drain

Yes

original state

Z(2)

TPWM

−

push-pull

LOW

−

P5.1

I/O

CMOS

open-drain

Yes

original state

Z(2)

PWM0

−

open-drain

Yes

LOW

−

P5.2

I/O

CMOS

open-drain

Yes

original state

Z(2)

PWM1

−

open-drain

Yes

LOW

−

P5.3

I/O

CMOS

open-drain

Yes

original state

Z(2)

PWM2

−

open-drain

Yes

LOW

−

P5.4

I/O

CMOS

open-drain

Yes

original state

Z(2)

PWM3

−

open-drain

Yes

LOW

−

P5.5

I/O

CMOS

open-drain

Yes

original state

Z(2)

PWM4

−

open-drain

Yes

LOW

−

n.c.

−−

−

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