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18F452 데이터시트(PDF) 85 Page - Microchip Technology |
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18F452 데이터시트(HTML) 85 Page - Microchip Technology |
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85 / 332 page ![]() 2002 Microchip Technology Inc. DS39564B-page 83 PIC18FXX2 REGISTER 8-9: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 — — — EEIP BCLIP LVDIP TMR3IP CCP2IP bit 7 bit 0 bit 7-5 Unimplemented: Read as '0' bit 4 EEIP: Data EEPROM/FLASH Write Operation Interrupt Priority bit 1 = High priority 0 = Low priority bit 3 BCLIP: Bus Collision Interrupt Priority bit 1 = High priority 0 = Low priority bit 2 LVDIP: Low Voltage Detect Interrupt Priority bit 1 = High priority 0 = Low priority bit 1 TMR3IP: TMR3 Overflow Interrupt Priority bit 1 = High priority 0 = Low priority bit 0 CCP2IP: CCP2 Interrupt Priority bit 1 = High priority 0 = Low priority Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown |
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