ADUCM350BBCZ datasheet(33/41 Pages) AD

33 / 41 page

ADuCM350

Data Sheet

Rev. A | Page 32 of 40

MEASUREMENT STAGE

The AFE consists of a multiplexed input, 160 kSPS, 16-bit ADC

with four dedicated voltage measurement channels and up to

eight multiplexed current measurement channels using the on-

chip transimpedance amplifier. The multiplexed channels are

filtered and differentially buffered prior to data conversion.

The ADC data can be interrogated using three methods.

• By raw data at 160 kSPS.

• At the output of a 50 Hz/60 Hz filter at 900 SPS.

• Through a discrete Fourier transform (DFT) engine.

The power line filter is optimized for fast settling, just 36.6 ms

settling. Data at 900 SPS can be further decimated by the user

without requiring additional filtering.

Figure 39. Power Line Rejection Modeling

The DFT engine performs a 2048-point single frequency

discrete Fourier transform. It takes the 16-bit ADC output and

converts it to complex impedance with real and imaginary

components. As the ADC samples at 160 kSPS, this allows for a

79.5 Hz signal energy bandwidth, which gives excellent

rejection of interferers.

Figure 40. Frequency Response, 2048-Point DFT at 20 kHz

Figure 41. Rx Stage

–20

–40

–60

–80

–100

100

200

300

400

500

FREQUENCY (Hz)

NOTCHES ARCHITECTED AT 50Hz

AND 60Hz TO REJECT POWER LINE

INTERFERENCE

FREQUENCY (Hz)

600

700

800

900

500

1000

1500

2000

2500

3000

3500

4000

–20

–40

–60

–80

–100

FREQUENCY (Hz)

0.5

1.0

1.5

2.0

2.5

3.0

3.5

100

–50

–100

–150

–200

RTIA

CTIA

TIA_I

TIA_O

VBIAS

AN_A

AN_B

AN_C

AN_D

DVDD/2

VCCM

VBIAS

ADC

VREF = 1.8V

–

AVDD/2

TEMPERATURE

SENSOR

PRECISION

REFERENCE

VREF

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