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ADuCM350BBCZ 데이터시트(PDF) 18 Page - Analog Devices

부품명 ADuCM350BBCZ
상세설명  16-Bit Precision, Low Power Meter On A
PDF  41 Pages
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제조업체  AD [Analog Devices]
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ADuCM350BBCZ 데이터시트(HTML) 18 Page - Analog Devices

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Data Sheet
ADuCM350
Rev. A | Page 17 of 40
Figure 6. SPI Master Mode Timing (Phase Mode = 0)
Table 32. SPI Slave Mode Timing
Parameter
Description
Min
Typ
Max
Unit
t
CS
CS to SCLK edge
38
ns
tSL
SCLK low pulse width1
(SPIXDIV[5:0] + 1) × tUCLK
ns
tSH
SCLK high pulse width1
62.5
(SPIDIV[5:0] + 1) × tUCLK
ns
tDAV
Data output valid after SCLK edge
49.1
ns
tDSU
Data input setup time before SCLK edge
20.2
ns
tDHD
Data input hold time after SCLK edge
10.1
ns
tDF
Data output fall time
12
35.5
ns
tDR
Data output rise time
12
35.5
ns
tSR
SCLK rise time
12
35.5
ns
tSF
SCLK fall time
12
35.5
ns
tDOCS
Data output valid after CS edge
25
ns
tSFS
CS high after SCLK edge
0
ns
1 tUCLK = 62.5 ns. It corresponds to the maximum internal clock frequency before clock dividers.
Figure 7. SPI Slave Mode Timing (Phase Mode = 1)
SCLK
(POLARITY = 0)
SCLK
(POLARITY = 1)
MOSI
MSB
BIT 6 TO BIT 1
LSB
MISO
MSB IN
BIT 6 TO BIT 1
LSB IN
tSH
tSR
tSF
tDR
tDF
tDAV
tDOSU
tDSU
tDHD
CS
1 SCLK CYCLE
tCS
tSL
1 SCLK CYCLE
tSFS
SCLK
(POLARITY = 0)
CS
SCLK
(POLARITY = 1)
tSH
tSL
tSR
tSF
tSFS
MISO
MSB
BIT 6 TO BIT 1
LSB
MOSI
MSB IN
BIT 6 TO BIT 1
LSB IN
tDHD
tDSU
tDAV
tDR
tDF
tCS



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