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WM8778EDS/R 데이터시트(PDF) 9 Page - Wolfson Microelectronics plc |
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WM8778EDS/R 데이터시트(HTML) 9 Page - Wolfson Microelectronics plc |
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9 / 50 page ![]() Product Preview WM8778 w PP Rev 1.7 June 2004 9 ADCBCLK/ DACBCLK (Output) DOUT ADCLRC/ DACLRC (Outputs) t DL DIN t DDA t DHT t DST Figure 3 Digital Audio Data Timing – Master Mode Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25 oC, Master Mode, fs = 48kHz, ADC/DACMCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information ADC/DACLRC propagation delay from ADC/DACBCLK falling edge tDL 0 10 ns DOUT propagation delay from ADCBCLK falling edge tDDA 0 10 ns DIN setup time to DACBCLK rising edge tDST 10 ns DIN hold time from DACBCLK rising edge tDHT 10 ns Table 2 Digital Audio Data Timing – Master Mode DIGITAL AUDIO INTERFACE – SLAVE MODE ADCBCLK DOUT ADCLRC DIN DACLRC WM8776 CODEC DVD Controller DACBCLK Figure 4 Audio Interface – Slave Mode |
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