| 전자부품 데이터시트 검색엔진 |
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DS2196 데이터시트(PDF) 60 Page - Dallas Semiconductor |
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DS2196 데이터시트(HTML) 60 Page - Dallas Semiconductor |
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60 / 157 page ![]() DS2196 60 of 157 SR2A: STATUS REGISTER 2 FRAMER A (Address = 21 Hex) (MSB) (LSB) RMF TMF SEC RFDL TFDL RMTCH RAF – SYMBOL POSITION NAME AND DESCRIPTION RMF SR2A.7 Receive Multiframe. Set on receive multiframe boundaries. TMF SR2A.6 Transmit Multiframe. Set on transmit multiframe boundaries. SEC SR2A.5 One Second Timer. Set on increments of one second based on RCLK; will be set in increments of 999 ms, 999 ms, and 1002 ms every 3 seconds. Set on increments of 42 ms (333 frames) if CCR3A.2 = 1. RFDL SR2A.4 Receive FDL Buffer Full. Set when the receive FDL buffer (RFDL) fills to capacity (8 bits). TFDL SR2A.3 Transmit FDL Buffer Empty. Set when the transmit FDL buffer (TFDL) empties. RMTCH SR2A.2 Receive FDL Match Occurrence. Set when the RFDL matches either RMTCH1A or RMTCH2A. RAF SR2A.1 Receive FDL Abort. Set when eight consecutive 1’s’s are received in the FDL. –SR2A.0 Not Assigned. Could be any value when read. SR2B: STATUS REGISTER 2 FRAMER B (Address = C1 Hex) (MSB) (LSB) RMF TMF SEC RFDL TFDL RMTCH RAF – SYMBOL POSITION NAME AND DESCRIPTION RMF SR2B.7 Receive Multiframe. Set on receive multiframe boundaries. TMF SR2B.6 Transmit Multiframe. Set on transmit multiframe boundaries. SEC SR2B.5 One Second Timer. Set on increments of one second based on RCLK; will be set in increments of 999 ms, 999 ms, and 1002 ms every 3 seconds. Set on increments of 42 ms (333 frames) if CCR3B.2 = 1. RFDL SR2B.4 Receive FDL Buffer Full. Set when the receive FDL buffer (RFDL) fills to capacity (8 bits). TFDL SR2B.3 Transmit FDL Buffer Empty. Set when the transmit FDL buffer (TFDL) empties. RMTCH SR2B.2 Receive FDL Match Occurrence. Set when the RFDL matches either RMTCH1B or RMTCH2B. RAF SR2B.1 Receive FDL Abort. Set when eight consecutive 1’s’s are received in the FDL. –SR2B.0 Not Assigned. Could be any value when read. |
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