DS2196 datasheet(28/157 Pages) DALLAS

28 / 157 page

DS2196

28 of 157

The factory in testing the DS2196 uses the two Test Registers at addresses 09 and 7D hex. On power–up,

the Test Registers should be set to 00 hex in order for the DS2196 to operate properly.

RCR1A: RECEIVE CONTROL REGISTER 1 FRAMER A (Address = 2B Hex)

(MSB)

(LSB)

LCVCRF

ARC

OOF1

OOF2

SYNCC

SYNCT

SYNCE

RESYNC

SYMBOL

POSITION

NAME AND DESCRIPTION

LCVCRF

RCR1A.7

Line Code Violation Count Register Function Select.

0 = do not count excessive 0’s

1 = count excessive 0’s

ARC

RCR1A.6

Auto Resync Criteria.

0 = Resync on OOF or RCL event

1 = Resync on OOF only

OOF1

RCR1A.5

Out Of Frame Select 1.

0 = 2/4 frame bits in error

1 = 2/5 frame bits in error

OOF2

RCR1A.4

Out Of Frame Select 2.

0 = follow RCR1.5

1 = 2/6 frame bits in error

SYNCC

RCR1A.3

Sync Criteria.

In D4 Framing Mode.

0 = search for Ft pattern, then search for Fs pattern

1 = cross couple Ft and Fs pattern

In ESF Framing Mode.

0 = search for FPS pattern only

1 = search for FPS and verify with CRC6

SYNCT

RCR1A.2

Sync Time.

0 = qualify 10 bits

1 = qualify 24 bits

SYNCE

RCR1A.1

Sync Enable.

0 = auto resync enabled

1 = auto resync disabled

RESYNC

RCR1A.0

Resync. When toggled from low to high, a resynchronization

of the receive side framer is initiated. Must be cleared and set

again for a subsequent resync.

DS2196 데이터시트(PDF) 28 Page - Dallas Semiconductor

DS2196 데이터시트(HTML) 28 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL