MPC855 datasheet(65/76 Pages) MOTOROLA

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MOTOROLA

MPC860 Family Hardware Speciﬁcations

UTOPIA AC Electrical Specifications

Figure 11-67 shows the I2C bus timing.

Figure 11-67. I2C Bus Timing Diagram

Part XII UTOPIA AC Electrical Speciﬁcations

Table 12-26 shows the AC electrical speciﬁcations for the UTOPIA interface.

Figure 12-68 shows signal timings during UTOPIA receive operations.

1 SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3) × pre_scaler × 2).

The ratio SYNCCLK/(BRGCLK / pre_scaler) must be greater or equal to 4/1.

Table 12-26. UTOPIA AC Electrical Speciﬁcations

Num

Signal Characteristic

Direction

Min

Max

Unit

UtpClk rise/fall time (Internal clock option)

Output

—

3.5

Duty cycle

Frequency

—

MHz

U1a

UtpClk rise/fall time (external clock option)

Input

—

3.5

Duty cycle

Frequency

—

MHz

RxEnb and TxEnb active delay

Output

UTPB, SOC, Rxclav and Txclav setup time

Input

—

UTPB, SOC, Rxclav and Txclav hold time

Input

—

UTPB, SOC active delay (and PHREQ and PHSEL active delay

in MPHY mode)

Output

SCL

202

205

203

207

204

208

206

209

211

210

SDA

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