FT240XS-R datasheet(8/40 Pages) FTDI

8 / 40 page

FT240X USB 8-BIT FIFO IC Datasheet

Version 1.3

Document No.: FT_000626 Clearance No.:

FTDI# 259

Pin No.

Name

Type

Description

RESET#

Input

Active low reset pin. This can be used by an external device to reset the

FT240X. If not required can be left unconnected, or pulled up to VCC.

SIWU#

Input

Active low input. May be used to flush the IC buffer back to the PC (Send

Immediate) or if the PC is in suspend mode it can be used as a Wake Up

signal.

CBUS5

I/O

Configurable CBUS I/O Pin. Function of this pin is configured in the

device MTP memory. See CBUS Signal Options, Table 3.9.

CBUS6

I/O

Configurable CBUS I/O Pin. Function of this pin is configured in the

device MTP memory. See CBUS Signal Options, Table 3.9.

Table 3.3 Miscellaneous Signal Group

Pin No.

Name

Type

Description

I/O

FIFO Data Bus Bit 0

I/O

FIFO Data Bus Bit 1

I/O

FIFO Data Bus Bit 2

I/O

FIFO Data Bus Bit 3

I/O

FIFO Data Bus Bit 4

I/O

FIFO Data Bus Bit 5

I/O

FIFO Data Bus Bit 6

I/O

FIFO Data Bus Bit 7

RD#

Input

Enables the current FIFO data byte on D0...D7 when low. Fetched the next FIFO

data byte (if available) from the receive FIFO buffer when RD# goes from high to

low. See Section 3.6 for timing diagram.

Input

Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR

goes from high to low. See Section 3.7 for timing diagram.

TXE#

Output

When high, do not write data into the FIFO. When low, data can be written into

the FIFO by strobing WR high, then low. During reset this signal pin is tri-state.

See Section 3.7 for timing diagram.

RXF#

Output

When high, do not read data from the FIFO. When low, there is data available in

the FIFO which can be read by strobing RD# low, then high again. During reset

this signal pin is tri-state. See Section 3.6 for timing diagram.

If the Remote Wakeup option is enabled in the internal MTP

memory, during USB

suspend mode (PWREN# = 1) RXF# becomes an input. This can be used to wake

up the USB host from suspend mode by strobing this pin low for a minimum of

20ms which will cause the device to request a resume on the USB bus.

Table 3.4 FIFO Interface Group (see note 2)

Notes:

When used in Input Mode, the input pins are pulled to VCCIO via internal 200kΩ resistors. These

pins can be programmed to gently pull low during USB suspend (PWREN# = “1”) by setting an

option in the internal MTP memory.

FT240XS-R 데이터시트(PDF) 8 Page - Future Technology Devices International Ltd.

FT240XS-R 데이터시트(HTML) 8 Page - Future Technology Devices International Ltd.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

데이터시트 다운로드

링크 URL