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AM29LV642D 데이터시트(PDF) 39 Page - Advanced Micro Devices |
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AM29LV642D 데이터시트(HTML) 39 Page - Advanced Micro Devices |
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39 / 53 page ![]() 38 Am29LV642D P R E L I M I NARY TEST CONDITIONS Table 12. Test Specifications Note: If V IO < VCC, the reference level is 0.5 VIO. KEY TO SWITCHING WAVEFORMS 2.7 k Ω CL 6.2 k Ω 3.3 V Device Under Test Note: Diodes are IN3064 or equivalent Figure 11. Test Setup Test Condition 90R 12R Unit Output Load 1 TTL gate Output Load Capacitance, C L (including jig capacitance) 30 100 pF Input Rise and Fall Times 5 ns Input Pulse Levels 0.0–3.0 V Input timing measurement reference levels (See Note) 1.5 V Output timing measurement reference levels 0.5 V IO V 3.0 V 0.0 V 1.5 V 0.5 VIO V Output Measurement Level Input Note: If V IO < VCC, the input measurement reference level is 0.5 VIO. Figure 12. Input Waveforms and Measurement Levels WAVEFORM INPUTS OUTPUTS Steady Changing from H to L Changing from L to H Don’t Care, Any Change Permitted Changing, State Unknown Does Not Apply Center Line is High Impedance State (High Z) |
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