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L9779WD-SPI 데이터시트(PDF) 109 Page - STMicroelectronics

부품명 L9779WD-SPI
상세설명  Smart reset function
PDF  141 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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L9779WD-SPI 데이터시트(HTML) 109 Page - STMicroelectronics

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L9779WD-SPI
Functional description
140
Read-only registers (ID and Diagnostic) have unique address 0x10 and are selected by 5bit
sub-address in MOSI DI-DATA IN field. MISO DO returns 1 at D9 bit and 5bit sub address in
ADD[4:0] field.
Timing characteristics
Figure 73. Timing characteristics diagram
Table 53. Timing characteristics
Symbol
Parameter
Conditions
Min
Max
Units
f
op
Transfer frequency
Design Information
-
8
MHz
t
sclk
SCK period
Design Information
125
-
ns
t
lead
Enable Lead time
Design Information
525
-
ns
t
lag
Enable lag time
Design Information
50
-
ns
t
sclkhs
SCK high time
Design Information
38
-
ns
t
sclkls
SCK low time
Design Information
38
-
ns
t
sus
DIN input setup time
Design Information
20
-
ns
t
hs
DIN input hold time
Design Information
20
-
ns
t
a
DO access time
50 pF load
-
60
ns
t
dis
DO disable time
50 pF load
-
100
ns
t
vs
DO output valid time
50 pF load
-
66
ns
t
ho
DO output hold time
50 pF load
0
-
ns
t
r
DO rise time
50 pF load
-
30
ns
t
f
DO fall time
50 pF load
-
30
ns
t
csn
CS negated time
Design Information
640
-
ns
t
sh
SCK hold time
Design Information
20
-
ns
t
csgrt
CS noise glitch rejection time
-
50
300
ns
t
nodata
SPI interframe time
Design Information
1.5
-
µs



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