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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STMPE321QTR 데이터시트(PDF) 20 Page - STMicroelectronics |
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STMPE321QTR 데이터시트(HTML) 20 Page - STMicroelectronics |
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20 / 40 page  Interrupt controller module STMPE321 20/40 Doc ID 15791 Rev 3 INT_STA Interrupt status register Address: 0x0A Type: R/W Reset: 0x09 Description: This register is used to enable the interruption from a system related interrupt source to the host. Regardless of whether or not the IESYSIOR bits are enabled, the ISSYSIOR bits are still updated. Writing ‘1’ clears a bit in this register. Writing ‘0’ has no effect. 76 543 2 1 0 GPIO RESERVED GEN FIFO POR [7] GPIO: One or more level transition in enabled GPIOs [6:3] RESERVED: Some of these bits might be set to '1' by hardware during normal operation. The content of these bit is for internal operation and are not required for normal use of device. [2] GEN: System INT (A2I, IA2, EOC) [1] FIFO: Data available in FIFO [0] POR: Power-on reset |
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