PC87309VLJ datasheet(58/192 Pages) NSC

58 / 192 page

The Floppy Disk Controller (FDC) (Logical Device 0)

www.national.com

FIGURE 3-5 on page 59 illustrates the track format for

each of the formats recognized by the FORMAT TRACK

command.

Sixth Command Phase Byte - Data Pattern

This byte contains the contents of the data field.

Execution Phase

The system transfers four ID bytes (track number, head

number, sector number and bytes-per-sector code) per sec-

tor to the Floppy Disk Controller (FDC) in either DMA or

non-DMA mode. Section 3.4.2 on page 45 describes these

modes.

The entire track is formatted. The data block in the data field

of each sector is filled with the data pattern byte.

Only the first three status bytes in this phase are significant.

TABLE 3-11. Typical Gap 3 Values

1. Gap 2 is speciﬁed in the command phase of read, write, scan, and verify commands. Although this is the rec-

ommended value, the FDC ignores this byte in read, write, scan and verify commands.

2. Gap 3 is the suggested value for use in the FORMAT TRACK command. This is the programmable Gap 3

illustrated in FIGURE 3-5 on page 59.

Result Phase

3.7.5

The INVALID Command

If an INVALID command (illegal opcode byte in the com-

mand phase) is received by the Floppy Disk Controller

(FDC), the controller responds with the result phase Status

page 48.

The controller does not generate an interrupt during this

condition. Bits 7 and 6 in the MSR (see Section 3.3.6 on

page 43) are both set to 1, indicating to the microprocessor

that the controller is in the result phase and the contents of

ST0 must be read.

Command Phase

Execution Phase

None.

Drive Type and

Data Transfer Rate

Bytes in Data

Field (decimal)

Bytes-Per-Sector

Code (hex)

End of Track (EOT)

Sector # (hex)

Bytes in Gap 2 1

(hex)

Bytes in Gap 3 2

(hex)

256

250 Kbps

512

MFM

512

1024

2048

4096

500 Kbps

256

010

MFM

512

1024

2048

4096

8192

76543210

Result Phase Status Register 0 (ST0)

Result Phase Status Register 1 (ST1)

Result Phase Status Register 2 (ST2)

Undeﬁned

76543210

Invalid Opcodes

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