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A6984 데이터시트(PDF) 14 Page - STMicroelectronics |
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A6984 데이터시트(HTML) 14 Page - STMicroelectronics |
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14 / 47 page ![]() Device description A6984 14/47 DocID030396 Rev 1 Figure 5. Maximum output voltage vs. input voltage range at ILOAD = 400 mA 4.1.2 Leading network The small signal contribution of a simple voltage divider is: Equation 2 A small signal capacitor in parallel to the upper resistor (see C3 in Figure 6) of the voltage divider implements a leading network (fzero < fpole) that can improve the dynamic regulation for boundary application conditions (high fSW / high duty cycle conversion) and improves the SNR for the feedback comparator operation, entirely coupling the high frequency output voltage ripple without the resistive divider attenuation. G DIV s R 2 R 2 R 3 + -------------------- = |
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