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PM8801 데이터시트(PDF) 16 Page - STMicroelectronics

부품명 PM8801
상세설명  High-efficiency, IEEE 802.3at compliant, integrated PoE-PD interface and PWM controller
PDF  37 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM8801 데이터시트(HTML) 16 Page - STMicroelectronics

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Electrical specifications
PM8801
16/37
DocID018560 Rev 2
Soft-start
TSS
Soft-start time
Over CTL full range (0 to 3V), at
Fosc = 250 kHz
12.3
ms
Current limit
Delay to output
Guaranteed by design
20
ns
Cycle-by-cycle current
limit threshold voltage
0.44
0.50
0.56
V
Leading edge blanking
time
45
60
75
ns
Slope compensation
current
Sourced by CS pin
45
µA
PWM comparator
Delay to output
Guaranteed by design
25
ns
Minimum duty cycle
CTL = 0, CS = 0
0
%
Maximum duty cycle
CTL = 2 V, CS = 0, Fosc = 250 kHz
75
80
85
%
CTL to PWM gain
Guaranteed by design
1: 4
CTL operative range
1
3
V
Output driver GAT1
Output high
IGD = 100 mA
VC-
0.25
VC-0.5
V
Output low
IGD = –100 mA
0.25
0.5
V
Fall time
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
40
ns
Rise time
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
45
ns
Peak source current
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
800
mA
Peak sink current
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
1A
Output driver GAT2
Output high
IGD = 100 mA
VC-
0.25
VC-0.5
V
Output low
IGD = –100 mA
0.25
0.5
V
Fall time
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
40
ns
Rise time
CLOAD = 3.3 nF, VC = 10 V
Guaranteed by design
45
ns
Table 6. Electrical characteristics - SMPS section (continued)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit



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