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TNETV1644ZDU6 데이터시트(PDF) 237 Page - Texas Instruments

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부품명 TNETV1644ZDU6
상세설명  Digital Media Processor
PDF  306 Pages
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6.12 Inter-Integrated Circuit (I2C)
Clock
Prescale
ICPSC
PeripheralClock
(DSP/18)
ICCLKH
Generator
BitClock
ICCLKL
Noise
Filter
SCL
ICXSR
ICDXR
Transmit
Transmit
Shift
Transmit
Buffer
ICDRR
Shift
ICRSR
Receive
Buffer
Receive
Receive
Filter
SDA
I2CData
Noise
ICOAR
ICSAR
Slave
Address
Control
Address
Own
ICMDR
ICCNT
Mode
Data
Count
Vector
Interrupt
Interrupt
Status
ICIVR
ICSTR
Mask/Status
Interrupt
ICIMR
Interrupt/DMA
I2CModule
I2CClock
Shadingdenotescontrol/statusregisters.
ICEMDR
Extended
Mode
TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008
The inter-integrated circuit (I2C) module provides an interface between DM6437 and other devices
compliant with Philips Semiconductors Inter-IC bus (I2C-bus™) specification version 2.1. External
components attached to this 2-wire serial bus can transmit/receive up to 8-bit data to/from the DSP
through the I2C module. The I2C port does not support CBUS compatible devices.
The I2C port supports:
• Compatible with Philips I2C Specification Revision 2.1 (January 2000)
• Fast Mode up to 400 Kbps (no fail-safe I/O buffers)
• Noise Filter to Remove Noise 50 ns or less
• Seven- and Ten-Bit Device Addressing Modes
• Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality
• Events: DMA, Interrupt, or Polling
• Slew-Rate Limited Open-Drain Output Buffers
Figure 6-29. I2C Module Block Diagram
For more detailed information on the I2C peripheral, see Section 2.9, Documentation Support section of
this document for the TMS320DM643x DMP Peripherals Overview Reference Guide (literature number
SPRU983).
Submit Documentation Feedback
Peripheral Information and Electrical Specifications
237



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