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TNETV1644ZDU6 데이터시트(PDF) 54 Page - Texas Instruments

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부품명 TNETV1644ZDU6
상세설명  Digital Media Processor
PDF  306 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

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TMS320DM6437
Digital Media Processor
SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008
www.ti.com
Table 2-20. VPBE Terminal Functions
SIGNAL
TYPE(1)
OTHER(2)(3)
DESCRIPTION
ZWT
ZDU
NAME
NO.
NO.
VIDEO OUT (VPBE)
HSYNC/EM_CS5/
IPD
This pin is multiplexed between VPBE, EMIFA, and GPIO.
F19
J22
I/O/Z
GP[33]
DVDD33
In VPBE mode, this pin is the VPBE Horizontal Sync (I/O/Z).
VSYNC/EM_CS4/
IPD
This pin is multiplexed between VPBE, EMIFA, and GPIO.
E19
H22
I/O/Z
GP[32]
DVDD33
In VPBE mode, this pin is the VPBE Vertical Sync (I/O/Z).
IPD
This pin is multiplexed between VPBE and GPIO.
VCLK/GP[31]
D19
G22
I/O/Z
DVDD33
In VPBE mode, this pin is the VPBE Clock Output.
IPD
This pin is multiplexed between VPBE and GPIO.
VPBECLK/GP[30]
G19
K22
I/O/Z
DVDD33
In VPBE mode, this pin is the VPBE Clock Input.
COUT0/EM_D[0]/
IPD
This pin is multiplexed between VPBE (VENC), EMIFA, and GPIO.
D16
E21
I/O/Z
GP[14]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT0.
COUT1/EM_D[1]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
D18
G20
I/O/Z
GP[15]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT1.
COUT2/EM_D[2]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
D17
E22
I/O/Z
GP[16]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT2.
COUT3/EM_D[3]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
E16
F20
I/O/Z
GP[17]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT3.
COUT4/EM_D[4]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
E18
G21
I/O/Z
GP[18]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT4.
COUT5/EM_D[5]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
E17
F22
I/O/Z
GP[19]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT5.
COUT6/EM_D[6]/
IPD
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
F16
F21
I/O/Z
GP[20]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT6.
COUT7/EM_D[7]/
IPD
This pin is multiplexed between VPBE (VENC), EMIFA, and GPIO.
F17
H20
I/O/Z
GP[21]
DVDD33
In VPBE mode, this pin is the video encoder (VENC) output COUT7.
YOUT0/GP[22]/
IPD
F18
J20
I/O/Z
(BOOTMODE0)
DVDD33
YOUT1/GP[23]/
IPD
F15
K20
I/O/Z
(BOOTMODE1)
DVDD33
YOUT2/GP[24]/
IPD
These pins are multiplexed between VPBE (VENC) and GPIO.
G15
L20
I/O/Z
(BOOTMODE2)
DVDD33
After reset, these are video encoder (VENC) outputs 6:0, YOUT[6:0].
YOUT3/GP[25]/
IPD
For proper DM6437 device operation, the YOUT6 pin must be pulled
G16
H21
I/O/Z
(BOOTMODE3)
DVDD33
down via an external resistor.
For proper DM6437 device operation, the YOUT5 pin must be pulled
YOUT4/GP[26]/
IPD
G17
K19
I/O/Z
up via an external resistor.
(FASTBOOT)
DVDD33
IPU
YOUT5/GP[27]
H17
L19
I/O/Z
DVDD33
YOUT6/
IPD
H16
J21
I/O/Z
GP[28]
DVDD33
YOUT7/
IPD
This pin is multiplexed between VPBE (VENC) and GPIO.
H15
K21
I/O/Z
GP[29]
DVDD33
In VPBE mode, this pin is the VENC output 7, YOUT7.
LCD_OE/EM_CS3/
IPD
This pin is multiplexed between VPBE, EMIFA, and GPIO.
C18
D22
I/O/Z
GP[13]
DVDD33
In VPBE mode, it is the LCD output enable LCD_OE (O/Z).
This pin is multiplexed between VPBE, EMIFA, and GPIO.
G0/EM_CS2/
IPD
C19
C22
I/O/Z
In VPBE mode, this pin is the RGB666/888 Green output data bit 0,
GP[12]
DVDD33
G0.
This pin is multiplexed between VPBE, EMIFA, and GPIO.
B0/LCD_FIELD/
IPD
B18
D21
I/O/Z
In VPBE mode, this pin is the RGB666/888 Blue output data bit 0, B0
EM_A[3]/GP[11]
DVDD33
or LCD interlaced LCD_FIELD (I/O/Z).
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2)
IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal
Device Overview
54
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