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STSPIN32F0 데이터시트(PDF) 12 Page - STMicroelectronics |
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STSPIN32F0 데이터시트(HTML) 12 Page - STMicroelectronics |
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12 / 40 page ![]() Electrical characteristics STSPIN32F0 12/40 DocID029806 Rev 2 Figure 3. Gate drivers timing Thermal protection TSD Thermal shut-down temperature - 130 140 150 °C Thys Thermal shut-down hysteresis - 20 30 40 °C 1. The current consumption depends on the firmware loaded in the microcontroller. 2. UVLO threshold VMon_max. 3. Using the 47 F capacitor (APXG250ARA470MF61G), 22 H inductor (MLF1608C220KTA00), and diode 1N4448TR. 4. With 11 < VM < 13 V the linear output voltage can be VREG12 or 'VM-VREG12,drop' depending on the linear regulator is already turned-on or not. 5. Figure 3. 6. MT = max. (|ton(LVG) - toff(LVG)|, |ton(HVG) - toff(HVG)|, |toff(LVG) - ton(HVG)|, |toff(HVG) - ton(LVG)|). 7. Guaranteed by design. 8. Guaranteed by IOUT test. 9. See Figure 16 on page 31. 10. 3FG circuitry enabled. The parameter is measured on the active open-drain edge (falling edge). Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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