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A6727 데이터시트(PDF) 24 Page - STMicroelectronics |
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A6727 데이터시트(HTML) 24 Page - STMicroelectronics |
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24 / 29 page ![]() Application information A6727 24/29 DocID025003 Rev 1 10.3 Input capacitors The input capacitor bank is designed mainly to stand input RMS current, which depends on the output current (IOUT) and duty cycle (D) for the regulation as follows: Equation 13 The equation reaches its maximum value, IOUT/2, when D = 0.5. Losses depend on the input capacitor ESR: Equation 14 I rms I OUT D1 D – () ⋅ ⋅ = PESR I rms 2 ⋅ = |
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