L6751 datasheet(22/59 Pages) STMICROELECTRONICS

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Device configuration and pinstrapping tables

L6751

22/59

Doc ID 023992 Rev 1

4.2

Programming HiZ level

The L6751 is able to manage different levels for HiZ on PWMx guaranteeing flexibility in

driving different external drivers as well as DrMOS ICs.

After EN assertion and before soft-start, the device uses PWM1 and PWM2 to detect the

driver/DrMOS connected in order to program the suitable Hiz level of PWMx signals. During

regulation, the Hiz level is used to force the external MOSFETs in high impedance state.

–

PWM1 sources a constant 10

μA current, if its voltage results higher than 2.8 V,

HiZ level used during the regulation is 1.4 V, if lower, PWM2 information is used.

–

PWM2 is kept in HiZ, if its voltage results higher than 2 V, HiZ level used during the

regulation is 2 V, if lower, 1.6 V.

An external resistor divider can be placed on PWM1 and PWM2 to force the detection of the

correct HiZ level. They must be designed considering the external driver/DrMOS selected

and the HiZ level requested.

Table 6.

Device configuration

SVI address

DROOP (see Table 8)

IMAX / SIMAX

BOOT / TMAX

DPM

VR12

0000b

Enabled.

Table 8

Table 10

Supported

VR12(1) ()

0010b

0100b

MPhase: as per Table 9.

SPhase: disabled

AMD

n/a

MPhase: enabled. SPhase:

as per Table 9.

Ignored

TMAX(2)

supported

In DDR mode, single-phase reference is multi-phase Vout/2 (JMode disabled).

Refer to Table 10 and choose any of the resistor combinations leading to the desired TNMAX. Other settings are ignored.

Table 7.

Phase number programming

PHASE #

PWM1 to PWM3

PWM4

PWM5

PWM6

to driver

1 k

Ω to VCC5

to driver

1 k

Ω to VCC5

to driver

1 k

Ω to VCC5

to driver

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