LNBH25LS datasheet(11/30 Pages) STMICROELECTRONICS

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LNBH25LS

Pin configuration

DocID026753 Rev 3

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Pin configuration

Figure 5: Pin connections (top view)

Table 2: Pin description

Symbol

Name

Function

NMOS drain

Integrated N-channel Power MOSFET drain

PGND

Power ground

DC-DC converter power ground. To be connected

directly to the exposed pad

ADDR

Address setting

Two I²C bus addresses available by setting the address

pin level voltage. See Table 15: "Address pin

characteristics"

SCL

Serial clock

Clock from I²C BUS

SDA

Serial data

Bi-directional data from/to I²C bus

ISEL

Current

selection

The resistor “RSEL” connected between ISEL and

GND defines the linear regulator current limit threshold.

See Section 6.5: "Transmission without acknowledge"

2,15,18,

19,23

GND

Analog ground

Analog circuits ground. To be connected directly to the

exposed pad

VBYP

Bypass

capacitor

Needed for internal pre-regulator filtering. The VBYP

pin is intended only to connect an external ceramic

capacitor. Any connection of this pin to external current

or voltage sources may cause permanent damage to

the device

VCC

Supply input

8 to 16 V IC DC-DC power supply

VOUT

LNB output port

Output of the integrated very low drop linear regulator.

See Table 13: "Output voltage selection table (data1

description

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