SPC56EL70L3 datasheet(102/128 Pages) STMICROELECTRONICS

102 / 128 page

Electrical characteristics

SPC56EL70L3, SPC56EL70L5,PC564L70L3, SPC564L70L5

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DocID023953 Rev 5

Figure 12. Pad output delay

3.19

Reset sequence

This section shows the duration for different reset sequences. It describes the different reset

sequences and it specifies the start conditions and the end indication for the reset

sequences.

3.19.1

Reset sequence duration

Table 31

specifies the minimum and the maximum reset sequence duration for the five

different reset sequences described in Section 3.19.2: Reset sequence description.

3Fast

—

—12

—

—40

100

—

—18

—

—25

—40

200

Symmetric

—

—50

—25

1. Propagation delay from VDD_HV_IOx/2 of internal signal to Pchannel/Nchannel switch-on condition (i.e. t_PHL and t_PLH in

Figure 12: Pad output delay

2. Slope at rising/falling edge(i.e. t_F and t_R in Figure 12: Pad output delay).

3. Data based on characterization results, not tested in production.

Table 30. Pad AC specifications (3.3 V, IPP_HVE = 0)(1) (continued)

Pad

Tswitchon1

(ns)

Rise/Fall(2)

(ns)

Frequency

(MHz)

Current slew(3)

(mA/ns)

Load

drive

(pF)

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

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