ST7DALIF2 datasheet(136/171 Pages) STMICROELECTRONICS

136 / 171 page

Electrical characteristics

ST7DALIF2

136/171

20.4.1

Supply current

TA = -40 to +85° C unless otherwise specified, VDD=5.5 V

Table 72.

Supply current characteristics

Symbol

Parameter

Conditions

Typ

Max

Unit

IDD

Supply current in RUN mode

External Clock, fCPU=1 MHz

(1)

CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all

peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

Internal RC, fCPU=1 MHz

2.2

fCPU=8 MHz

(1)

7.5

Supply current in Wait mode

External Clock, fCPU=1 MHz

(2)

All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; clock

input (CLKIN) driven by external square wave, LVD disabled.

0.8

Internal RC, fCPU=1 MHz

1.8

fCPU=8 MHz

(2)

3.7

Supply current in Slow mode

fCPU=250 kHz

(3)

Slow mode selected with fCPU based on fOSC2 divided by 32. All I/O pins in input mode with a static value

at VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave,

LVD disabled.

1.6

2.5

Supply current in Slow Wait

mode

fCPU=250 kHz

(4)

Slow-Wait mode selected with fCPU based on fOSC2 divided by 32. All I/O pins in input mode with a static

value at VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square

wave, LVD disabled.

1.6

2.5

Supply current in Halt mode (5)

All I/O pins in output mode with a static value at VSS (no load), LVD disabled. Data based on

characterization results, tested in production at VDD max and fCPU max.

-40° C

≤T

A≤+85° C

μA

TA= +125° C

Supply current in AWUFH

mode (6)(7)

All I/O pins in input mode with a static value at VDD or VSS (no load). Data tested in production at VDD max.

and fCPU max.

This consumption refers to the Halt period only and not the associated run period which is software

dependent.

TA= +25° C

Figure 63.

Typical IDD in RUN vs. fCPU

Figure 64.

Typical IDD in Slow vs. fCPU

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

Vdd (V)

8Mhz

4Mhz

1Mhz

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

22.5

33.5

4.5

5.5

Vdd(V)

250Khz

125Khz

62.5Hz

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