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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST7FOXA0 데이터시트(PDF) 62 Page - STMicroelectronics |
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ST7FOXA0 데이터시트(HTML) 62 Page - STMicroelectronics |
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62 / 123 page  On-chip peripherals ST7FOXA0 62/123 9.1.6 Low power modes Table 20. Effect on Lite timer 9.1.7 Interrupts Table 21. Interrupt events Note: The TBF and ICF interrupt events are connected to separate interrupt vectors (see Interrupts chapter). They generate an interrupt if the enable bit is set in the LTCSR register and the interrupt mask in the CC register is reset (RIM instruction). Figure 30. Input capture timing diagram 9.1.8 Register description Lite Timer Control/Status Register (LTCSR) Reset Value: 0000 0x00 (0xh) Mode Description Wait No effect on Lite timer Active-halt No effect on Lite timer Halt Lite timer stops counting Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt Exit from Active-Halt Timebase event TBF TBIE Yes No Yes IC Event ICF ICIE Yes No No 0004h 13-bit COUNTER t 0001h fOSC xxh 0002h 0003h 0005h 0006h 0007h 04h LTIC PIN ICF FLAG LTICR REGISTER CLEARED 125ns (@ 8MHz fOSC) fCPU BY S/W 07h READING LTIC REGISTER 7 0 ICIE ICF TB TBIE TBF WDGRF WDGE WDGD Read/Write Obsolete Product(s) - Obsolete Product(s) |
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