ST7FOXA0 datasheet(79/123 Pages) STMICROELECTRONICS

79 / 123 page

ST7FOXA0

Instruction set

79/123

10.1.1

Inherent mode

All Inherent instructions consist of a single byte. The opcode fully specifies all the required

information for the CPU to process the operation.

Long

Indirect

Indexed

A,([$10.w],X)

0000..FFFF

00..FF

word

+ 2

Relative

Direct

jrne loop

PC-

128/PC+127(1)

+ 1

Relative

Indirect

jrne [$10]

PC-

128/PC+127(1)

00..FF

byte

+ 2

Bit

Direct

bset $10,#7

00..FF

+ 1

Bit

Indirect

bset [$10],#7

00..FF

byte

+ 2

Bit

Direct

Relative

btjt

$10,#7,skip

00..FF

+ 2

Bit

Indirect

Relative

btjt

[$10],#7,skip

00..FF

byte

+ 3

At the time the instruction is executed, the Program Counter (PC) points to the instruction following JRxx.

Table 30.

ST7 addressing mode overview (continued)

Mode

Syntax

Destination/

source

Pointer

address

Pointer

size

Length

(bytes)

Table 31.

Instructions supporting inherent addressing mode

Instruction

Function

NOP

No operation

TRAP

S/W interrupt

WFI

Wait for interrupt (low power mode)

HALT

Halt oscillator (lowest power mode)

RET

Subroutine return

IRET

Interrupt subroutine return

SIM

Set interrupt mask

RIM

Reset interrupt mask

SCF

Set carry flag

RCF

Reset carry flag

RSP

Reset stack pointer

Load

CLR

Clear

PUSH/POP

Push/Pop to/from the stack

INC/DEC

Increment/decrement

TNZ

Test negative or zero

CPL, NEG

1 or 2 complement

Obsolete

Product(s)

- Obsolete

Product(s)

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