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ST7LITE49K2 데이터시트(PDF) 228 Page - STMicroelectronics

부품명 ST7LITE49K2
상세설명  Communication interfaces
PDF  245 Pages
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ST7LITE49K2 데이터시트(HTML) 228 Page - STMicroelectronics

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Electrical characteristics
ST7LITE49K2
228/245
Figure 125. ADC accuracy characteristics
Table 103.
Amplifier characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD(AMP)
Amplifier operating voltage
3.6
5.5
V
VIN
Amplifier input voltage(1)
1.
Please refer to the Application Note AN1830 for details of TE% vs Vin.
VDD = 3.6 V
0
350
mV
VDD = 5 V
0
500
VOFFSET
(2)
2.
Data based on characterization results over the whole temperature range, not tested in production.
Amplifier output offset
voltage(3)
3.
Refer to the offset variation in temperature below
VDD= 5 V
200
mV
VSTEP
(2)
Step size for monotonicity(4)
4.
Monotonicity guaranteed if VIN increases or decreases in steps of min. 5mV.
VDD = 3.6 V
3.5
mV
VDD = 5 V
4.89
Linearity (2)
Output voltage response
linear
Gain factor
(2)
Amplified analog input gain(5)
5.
For precise conversion results it is recommended to calibrate the amplifier at the following two points: offset
at VINmin = 0V ; gain at full scale (for example VIN = 430 mV)
8
Vmax (2)
Output linearity max voltage
VINmax = 430 mV,
VDD = 5 V
3.65
V
Vmin (2)
Output linearity min voltage
200
mV
EO
EG
1LSBIDEAL
1LSBIDEAL
VDD VSS
1024
--------------------------------
=
Vin (LSBIDEAL)
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
ET=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer
curves.
EO=Offset Error: deviation between the first
actual transition and the first ideal one.
EG=Gain Error: deviation between the last
ideal transition and the last actual one.
ED=Differential Linearity Error: maximum
deviation between actual steps and the ideal
one.
EL=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
Digital Result
1023
1022
1021
5
4
3
2
1
0
7
6
1
2
34
56
7
1021 1022 1023 1024
(1)
(2)
ET
ED
EL
(3)
VDD
VSS



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