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ST72361AR4-Auto 데이터시트(PDF) 219 Page - STMicroelectronics

부품명 ST72361AR4-Auto
상세설명  Clock, reset and supply management
PDF  279 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST72361AR4-Auto 데이터시트(HTML) 219 Page - STMicroelectronics

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ST72361xx-Auto
Instruction set
Doc ID 12468 Rev 3
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18
Instruction set
18.1
CPU addressing modes
The CPU features 17 different addressing modes which can be classified in seven main
groups:
The CPU Instruction set is designed to minimize the number of bytes required per
instruction: To do so, most of the addressing modes may be subdivided in two submodes
called long and short:
●
Long addressing mode is more powerful because it can use the full 64 Kbyte address
space, however it uses more bytes and more CPU cycles.
●
Short addressing mode is less powerful because it can generally only access page
zero (0000h - 00FFh range), but the instruction size is more compact, and faster. All
memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
The ST7 Assembler optimizes the use of long and short addressing modes.
Table 86.
Addressing mode groups
Addressing mode
Example
Inherent
nop
Immediate
ld A, #$55
Direct
ld A, $55
Indexed
ld A, ($55,X)
Indirect
ld A, ([$55],X)
Relative
jrne loop
Bit operation
bset
byte, #5
Table 87.
CPU addressing mode overview
Mode
Syntax
Destination
Pointer
address
(hex.)
Pointer
size
(hex.)
Length
(bytes)
Inherent
nop
+ 0
Immediate
ld A, #$55
+ 1
Short
Direct
ld A, $10
00..FF
+ 1
Long
Direct
ld A, $1000
0000..FFFF
+ 2
No Offset
Direct
Indexed ld A, (X)
00..FF
+ 0
Short
Direct
Indexed ld A, ($10,X)
00..1FE
+ 1
Long
Direct
Indexed ld A, ($1000,X)
0000..FFFF
+ 2
Short
Indirect
ld A, [$10]
00..FF
00..FF
byte
+ 2
Long
Indirect
ld A, [$10.w]
0000..FFFF
00..FF
word
+ 2



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