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ST72561AR4-Auto 데이터시트(PDF) 60 Page - STMicroelectronics |
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ST72561AR4-Auto 데이터시트(HTML) 60 Page - STMicroelectronics |
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60 / 324 page ![]() Interrupts ST72561-Auto 60/324 Doc ID 12370 Rev 8 6.6.2 Register description External interrupt control register 0 (EICR0) Read/Write Reset value: 0000 0000 (00h) Bits 7:6 = IS3[1:0] ei3 sensitivity The interrupt sensitivity, defined using the IS3[1:0] bits, is applied to the ei3 external interrupts: These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3). Bits 5:4 = IS2[1:0] ei2 sensitivity The interrupt sensitivity, defined using the IS2[1:0] bits, is applied to the ei2 external interrupts: These 2 bits can be written only when I1 and I0 of the CC register are both set to 1 (level 3). Bits 3:2 = IS1[1:0] ei1 sensitivity The interrupt sensitivity, defined using the IS1[1:0] bits, is applied to the ei1 external interrupts: 7 0 IS31 IS30 IS21 IS20 IS11 IS10 IS01 IS00 Table 17. Interrupt sensitivity - ei3 IS31 IS30 External interrupt sensitivity 0 0 Falling edge and low level 1 Rising edge only 1 0 Falling edge only 1 Rising and falling edge Table 18. Interrupt sensitivity - ei2 IS21 IS20 External interrupt sensitivity 0 0 Falling edge and low level 1 Rising edge only 1 0 Falling edge only 1 Rising and falling edge Table 19. Interrupt sensitivity - ei1 IS11 IS10 External interrupt sensitivity 0 0 Falling edge and low level 1 Rising edge only |
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