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STM32F398VE 데이터시트(PDF) 122 Page - STMicroelectronics |
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STM32F398VE 데이터시트(HTML) 122 Page - STMicroelectronics |
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122 / 151 page ![]() Electrical characteristics STM32F398VE 122/151 DocID027227 Rev 2 SPI/I2S characteristics Unless otherwise specified, the parameters given in Table 71 for SPI or in Table 72 for I2S are derived from tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 18. Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I2S). Table 71. SPI characteristics(1) Symbol Parameter Conditions Min Typ. Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode, SPI1/2/3/4 -- 18 MHz Slave mode, SPI1/2/3/4 -- 18 Slave mode transmitter/full duplex, 1.65 V<VDD<1.95 V, SPI1/2/3/4 -- 12.5(2) Duty(SCK) Duty cycle of SPI clock frequency Slave mode 30 50 70 % tsu(NSS) NSS setup time Slave mode, SPI presc = 2 4*Tpclk - - ns th(NSS) NSS hold time Slave mode, SPI presc = 2 2*Tpclk - - tw(SCKH) tw(SCKL) SCK high and low time Master mode Tpclk-2 Tpclk Tpclk+2 tsu(MI) Data input setup time Master mode 0 - - tsu(SI) Slave mode 3 - - th(MI) Data input hold time Master mode 5 - - th(SI) Slave mode 1 - - ta(SO) Data output access time Slave mode 10 - 40 tdis(SO) Data output disable time Slave mode 10 - 17 tv(SO) Data output valid time Slave mode - 22 39 tv(MO) Master mode - 1.5 5 th(SO) Data output hold time Slave mode 11 - - th(MO) Master mode 0 - - 1. Data based on characterization results, not tested in production. 2. The maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%. |
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