STM32L162RC datasheet(120/123 Pages) STMICROELECTRONICS

120 / 123 page

Revision History

STM32L162VC, STM32L162RC

120/123

DocID022881 Rev 10

06-Nov-2013

(continued)

Updated Table 67: LQFP64, 10 x 10 mm 64-pin low-profile quad flat

package mechanical data and Table 68: UFBGA100, 7 x 7 mm, 0.5

mm pitch package mechanical data exchange Min and Typ values

inside columns.

Updated Chapter 8: Part numbering (title).

Added VDD= 1.71 to 1.8 V operating power supply range in Table 5:

Functionalities depending on the working mode (from Run/active down

to standby)

Updated “SDA data hold time” and “SDA and SCL rise time” values

and added “Pulse width of spikes that are suppressed by the analog

filter” row in Table 56: I2C characteristics

Updated the conditions in Table 26: Low-power mode wakeup timings.

Removed ambiguity of “ambient temperature” in the electrical

characteristics description.

19-May-2014

Added package UFBGA100.

Resistive load and capacitive load now abbreviated "RL" and "CL"

respectively (instead of "RLOAD" and "CLOAD") throughout the

document.

Modified introduction of Section 2.2: Ultra-low-power device

continuum.

Updated Table 3: Functionalities depending on the operating power

supply range.

Updated Table 5: Functionalities depending on the working mode (from

Run/active down to standby).

Added row VREF+ –VDDA and updated IIO in Table 11: Voltage

characteristics.

Modified IIO maximum values in Table 12: Current characteristics.

Added input voltage in Table 14: General operating conditions.

Moved Table 17: Embedded internal reference voltage from

Section 3.10.2: Internal voltage reference (VREFINT) to Section 6.3.3:

Embedded internal reference voltage.

Modified introduction of Section 6.3.4: Supply current characteristics.

Updated all tables in Section 6.3.4: Supply current characteristics

(i.e. Table 18 to Table 24)

Modified “Wakeup time from low-power mode” to Section 6.3.5.

Updated Table 27: High-speed external user clock characteristics.

Updated Table 28: Low-speed external user clock characteristics.

Modified tLOCK values in Table 34: PLL characteristics.

Modified Functional susceptibility to I/O current injection.

Updated Table 43: I/O static characteristics.

Updated Table 44: Output voltage characteristics.

Updated Table 46: NRST pin characteristics.

Table 72. Document revision history (continued)

Date

Revision

Changes

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