STM32F765 datasheet(48/255 Pages) STMICROELECTRONICS

48 / 255 page

Functional overview

STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

48/255

DocID029041 Rev 4

2.38

Management Data Input/Output (MDIO) slaves

The devices embed a MDIO slave interface it includes the following features:

•

32 MDIO Registers addresses, each of which is managed using separate input and

output data registers:

–

32 x 16-bit firmware read/write, MDIO read-only output data registers

–

32 x 16-bit firmware read-only, MDIO write-only input data registers

•

Configurable slave (port) address

•

Independently maskable interrupts/events:

–

MDIO Register write

–

MDIO Register read

–

MDIO protocol error

•

Able to operate in and wake up from STOP mode

2.39

Random number generator (RNG)

All the devices embed an RNG that delivers 32-bit random numbers generated by an

integrated analog circuit.

2.40

General-purpose input/outputs (GPIOs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain,

with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down)

or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog

alternate functions. All GPIOs are high-current-capable and have speed selection to better

manage internal noise, power consumption and electromagnetic emission.

The I/O configuration can be locked if needed by following a specific sequence in order to

avoid spurious writing to the I/Os registers.

A fast I/O handling allows a maximum I/O toggling up to 108 MHz.

2.41

Analog-to-digital converters (ADCs)

Three 12-bit analog-to-digital converters are embedded and each ADC shares up to 16

external channels, performing conversions in the single-shot or scan mode. In scan mode,

automatic conversion is performed on a selected group of analog inputs.

Additional logic functions embedded in the ADC interface allow:

•

Simultaneous sample and hold

•

Interleaved sample and hold

The ADC can be served by the DMA controller. An analog watchdog feature allows very

precise monitoring of the converted voltage of one, some or all selected channels. An

interrupt is generated when the converted voltage is outside the programmed thresholds.

To synchronize A/D conversion and timers, the ADCs could be triggered by any of TIM1,

TIM2, TIM3, TIM4, TIM5, or TIM8 timer.

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