PC87415VCG datasheet(32/42 Pages) NSC

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80 Electrical Characteristics (Continued)

84 AC TIMING SPECIFICATIONS

841 PCI Timing Specifications

The following AC timing specifications have been fully tested in silicon

Tested Timing Parameters

Symbol

Parameter

Min

Max

Units

Notes

t1a

PCI signals CBE FRAME

TRDY

Input Setup Time to CLK

CLK High to IRQ14 VaIid

The following AC timing specifications are based on simulation data except where noted

PCI Timing Parameters

Symbol

Parameter

Min

Max

Units

Notes

CLK Period

tHIGH

CLK High Time

tLOW

CLK Low Time

t1a

PCI Signals Input Setup Time to CLK

7 5

(bussed signals)

t1b

PCI Signals Input Setup Time to CLK

10 12

GNT

10 ns

(Point to Point)

GNT

12 ns

t2a

PCI Signals CLK to Output Valid

211

(Busted Signals)

t2b

PCI Signals CLK to Output Valid

212

(Point to Point)

CLK Slew Rate

Vns

RST

Slew Rate

mVns

tON

Float to Active Delay

tOFF

Active to Float Delay

Input Hold Time from CLK

tRST

Reset Active Time After Power Stable

tRST-CLK

Reset Active Time After CLK Stable

100

tRST-OFF

Reset Active to Output Float Delay

Note 1

Characterization of the PC87415 silicon shows a setup time of 5 ns for the following PCI signals CBE FRAME

and TRDY

All other PCI bus signals

have a setup time of 7 ns based on simulation data

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