Rev. PrC | Page 11 of 13

Table 4. Pin Description

Pin No.

Mnemonic

Type

Direction

Description

1

AIN0-

Analog Input

Input

Analog Input Channel 0

2

AIN0+

Analog Input

Input

Analog Input Channel 0

3

AIN1

−

Analog Input

Input

Analog Input Channel 1

4

AIN1+

Analog Input

Input

Analog Input Channel 1

5

AVSS1A

Supply

Supply

Negative Front End Analog Supply for Channels 0 to 3, typical

Supply), and AGND (Single Supply). Connect all AVSSx pins to the same

potential

6

AVDD1A

Supply

Supply

Positive Front End Analog Supply for Channels 0 to 3, typical AVSSx + 3.3V.

This pin should be connected together with AVDD1B.

7

REF1

−

Reference

Input

Negative Reference Input for Channels 0 to 3, typical AVSSx. Connect all

REFx

8

REF1+

Reference

Input

Positive Reference Input 1 for Channels 0 to 3, typical REF1

9

AIN2

−

Analog Input

Input

Analog Input Channel 2

10

AIN2+

Analog Input

Input

Analog Input Channel 2

11

AIN3

−

Analog Input

Input

Analog Input Channel 3

12

AIN3+

Analog Input

Input

Analog Input Channel 3

13

MODE0/GPIO0

Digital I/O

IO

PIN Control Mode: MODE0 input pin,

SPI Control Mode: Configurable GPIO0. If this pin is not used, connect to

DGND or IOVDD.

14

MODE1/GPIO1

Digital I/O

IO

PIN Control Mode: MODE1 input pin

SPI Control Mode: Configurable GPIO1. If this pin is not used, connect to

DGND or IOVDD.

15

MODE2/GPIO2

Digital I/O

IO

PIN Control Mode: MODE2 input pin,

SPI Control Mode: Configurable GPIO2. If this pin is not used, connect to

DGND or IOVDD.

16

MODE3/ALERT

Digital I/O

IO

PIN Control Mode: MODE3 input pin,

SPI Control Mode: Alert Output Pin

17

CONVST_SAR

Digital Input

Input

Pin Control Mode – ΣΔ output interface selection

SPI Control Mode - SAR Convert Start

18

ALERT/CS

Digital Input

Input

PIN Control Mode: Alert Output Pin

SPI Control Mode: Chip Select

19

DCLK2 / SCLK

Digital Input

Input

PIN Control Mode: DCLK frequency selection,

SPI Control Mode: SPI Clock.

20

DCLK1 / SDI

Digital Input

Input

PIN Control Mode: DCLK frequency selection

SPI Control Mode: SPI Data In. Connect this pin to DGND if the part is

configured in Pin Contro Mode with SPI as data output interface

21

DCLK0 / SDO

Digital Output Output

PIN Control Mode: DCLK frequency selection

SPI Control Mode: SPI Data Out

22

DGND

Supply

Supply

Digital ground

23

DREGCAP

Supply

Output

Digital LDO output. Decouple to DGND with 1uF cap

24

IOVDD

Supply

Supply

IO Digital levels and DLDO supply, from 1.8V to 3.6V. IOVDD should not be

lower than DRegCap.

25

DOUT3

Digital Output IO

Data output pin 3. If the part is configured in daisy-chain mode, this pin acts

as an input pin.

Preliminary Technical Data

AD7771