| 전자부품 데이터시트 검색엔진 |
|
L9660 데이터시트(PDF) 19 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9660 데이터시트(HTML) 19 Page - STMicroelectronics |
|
19 / 49 page ![]() DocID024714 Rev 2 19/49 L9660 Functional description 48 3.2.3 Reference resistor IREF pin shall be connected to VDD supply through a resistor, RIREF. When the L9660 detects the resistor on IREF pin is larger than RIREF_H or smaller than RIREF_L, it goes into a reset condition. All outputs are disabled and all internal registers are reset to their default conditions. 3.2.4 Loss of ground GND When the GND pin is disconnected from PC-board ground, the L9660 goes in reset condition. All outputs are disabled and all internal registers are reset to their default conditions. GND0-GND3 A loss of power-ground (GND0 – GND3) pin/s disables the respective low side driver/s on SQLx. However, the high side driver of the respective channel is still able to be turned on. Thus under the scenario where the low side is shorted to ground the L9660 is able to provide the programmed firing current for the specified time. An open GNDx connection on any channel has no affect on the other channels. An open GNDx condition is detected using the low side MOS diagnostics. AGND The AGND pin is a reference for AOUT pin. When AGND loses its connection, the voltage on AOUT pin is pulled up to VDD voltage and L9660 goes in reset condition. All outputs are disabled and all internal register are reset to their default conditions. 3.2.5 VRESx capacitance To properly ensure all diagnostics functions a typical capacitor of equal to or greater than 68nF is required close to the firing supply pins. Thus a minimum of 2 capacitors are required with one placed close to the VRES0 and VRES1 pins and a second capacitor close to the VRES2 and VRES3 pins. 3.2.6 Supply voltages The primary current sources for the different functions of the ASIC are as follows: VRESx - Firing currents along with HSS and HS FET diagnostic currents VSDIAG - Squib resistance and HSS diagnostics VDD is used for all internal functions as well as short to battery/ground and high squib resistance diagnostics. 3.2.7 Ground connections GND pin (6) is not connected internally to other ground pins (AGND or power ground GNDx). A ground plane is needed to directly connect the GND pin. This ground plane needs to be isolated from the high current ground for the squib drivers to prevent voltage shifts. AGND pin should be connected to ground plane too to minimize drop versus ground reference of ADC that capture AOUT voltage. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |