| 전자부품 데이터시트 검색엔진 |
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LP3906 데이터시트(PDF) 19 Page - National Semiconductor (TI) |
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LP3906 데이터시트(HTML) 19 Page - National Semiconductor (TI) |
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19 / 38 page ![]() LP3906 Default Power-Up Sequence 20197810 Power-On Timing Specification Symbol Description Min Typ Max Units t 1 Programmable Delay from EN_T assertion to V CC_Buck1 On 1.5 ms t 2 Programmable Delay from EN_T assertion to V CC_Buck2 On 2 ms t 3 Programmable Delay from EN_T assertion to V CC_LDO1 On 3 ms t 4 Programmable Delay from EN_T assertion to V CC_LDO2 On 6 ms Note: LP3906 The default Power on delays can be reprogrammed at final test or I2C to 1, 1.5, 2, 3, 6, or 11 ms. www.national.com 19 |
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