INTERRUPT STATUS REGISTER (ISRA) 0X02

This register informs the user of the temperature status of the chip.

D7-2

D1

D0

Name

—

Temp 125˚C

—

Access

—

R

—

Data

Reserved

Reserved

Reset

0

0

0

CONTROL 1 REGISTER (SCR1) 0X07

This register allows the user to select the preset delay sequence for power-on timing, to switch between PFM and PWM mode

for the bucks, and also to select between an internal and external clock for the bucks.

The external LDO and SW enables should be pulled LOW to allow the blocks to sequence correctly through assertion of the EN_T

pin.

D7

D6-4

D3

D2

D1

D0

Name

—

EN_DLY

—

FPWM2

FPWM1

ECEN

Access

—

R/W

—

R/W

R/W

R/W

Data

Reserved

Selects the preset

delay sequence from

EN_T assertion

(shown below)

Reserved

Buck 2 PWM /PFM

Mode select

0 – Auto Switch PFM

- PWM operation

1 – PWM Mode Only

Buck 1 PWM /PFM

Mode select

0 – Auto Switch PFM

- PWM operation

1 – PWM Mode Only

External Buck Clock

Select

0 – Internal 2 MHz

Oscillator clock

1 – External 13 MHz

Oscillator clock

Reset

0

010

1

0

0

0

EN_DLY PRESET DELAY SEQUENCE AFTER EN_T ASSERTION

Delay (ms)

Buck1

Buck2

LDO1

LDO2

000

11

1

1

001

1

1.5

2

2

010

1.5

2

3

6

011

1.5

2

1

1

100

1.5

2

3

6

101

1.5

1.5

2

2

110

3

2

1

1.5

111

23

6

11

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