CS61575-IP1 datasheet(18/44 Pages) CIRRUS

18 / 44 page

An address/command byte, shown in Table 9, pre-

cedes a data register. The first bit of the

address/command byte determines whether a read

or a write is requested. The next six bits contain

the address. The line interface responds to address

16 (0010000). The last bit is ignored.

The data register, shown in Table 10, can be writ-

ten to the serial port. Data is input on the eight

clock cycles immediately following the ad-

dress/command byte. Bits 0 and 1 are used to

clear an interrupt issued from the INT pin, which

occurs in response to a loss of signal or a problem

with the output driver.

Writing a "1" to either "Clear LOS" or "Clear

DPM" over the serial interface has three effects:

1) The current interrupt on the serial interface

will be cleared. (Note that simply reading

the register bits will not clear the inter-

rupt).

2) Output data bits 5, 6 and 7 will be reset as

appropriate.

3) Future interrupts for the corresponding LOS

or DPM will be prevented from occurring.

Writing a "0" to either "Clear LOS" or "Clear

DPM" enables the corresponding interrupt for

LOS or DPM.

Output data from the serial interface is presented

as shown in Tables 11 and 12. Bits 2, 3 and 4 can

be read to verify line length selection. Bits 5, 6

and 7 must be decoded. Codes 101, 110 and 111

(Bits 5, 6 and 7) indicate intermittent loss of sig-

nal and/or driver problems.

SDO goes to a high impedance state when not in

use. SDO and SDI may be tied together in appli-

cations where the host proc esso r has a

bi-directional I/O port.

LSB, first bit

clr LOS Clear Loss Of Signal

clr DPM Clear Driver Performance

LEN0

Bit 0 - Line Length Select

LEN1

Bit 1 - Line Length Select

LEN2

Bit 2 - Line Length Select

RLOOP Remote Loopback

LLOOP Local Loopback

MSB, last bit

TAOS

Transmit All Ones Select

Table 10. Input Data Register

SCLK

SDO

SDI

Address/Command Byte

Data Input/Output

R/W

Figure 13. Input/Output Timing

LSB, first bit

LOS

Loss Of Signal

DPM

Driver Performance

LEN0

Bit 0 - Line Length Select

LEN1

Bit 1 - Line Length Select

LEN2

Bit 2 - Line Length Select

Table 11. Output Data Bits 0 - 4

LSB, first bit

R/W

Read/Write Select; 0 = write, 1 = read

ADDP

LSB of address, Must be 0

ADD1

Must be 0

ADD2

Must be 0

ADD3

Must be 0

ADD4

Must be 1

Reserved - Must be 0

MSB, last bit

Don’t Care

Table 9. Address/Command Byte

CS61574A CS61575

DS154F2

CS61575-IP1 데이터시트(PDF) 18 Page - Cirrus Logic

CS61575-IP1 데이터시트(HTML) 18 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

데이터시트 다운로드

링크 URL