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CS61575-IP1 데이터시트(PDF) 35 Page - Cirrus Logic

부품명 CS61575-IP1
상세설명  T1/E1 LINE INTERFACE
PDF  44 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61575-IP1 데이터시트(HTML) 35 Page - Cirrus Logic

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R16
1k
Ω
8
RCLK
2
TCLK
3
TPOS
(TDATA)
6
RNEG
(BPV)
Pin 3
TCLK
RCLK
Pin 6
4
TNEG
7
RPOS
(RDATA)
1
ACLKI
Pin 7
ACLKI
R1 51.1
Ω
Pin 4
S2
R15
100
Ω
RV+
RV+
Q1
2N2222
R6
470
Ω
LED
D3
RV+
Q2
2N2222
R5
470
Ω
LED
D2
JP1
D9
1N914
D8
R14
4.7k
Ω
SIP
RV+
LOS
DPM
(AIS)
MODE
R18
10k
Ω
R17
10k
Ω
511
12
23
24
25
26
27
28
LEN1/SDI
LEN2/SD0
LLOOP/SCLK
TAOS/CLKE
TCODE
RLOOP/CS
SDI
SDO
SCLK
INT
CS
LEN0/INT
S1
RESET
MODE
SW1
R4
221k
Ω
A
A
BB
DD
C
C
JP4
JP2
RCODE
C4 0.047
µF
3
6
875
1
2
4
HOST:3-1,6-8
EXT HW: 3-2, 6-7
HW: 3-4, 6-5
18
TRING
TTIP
0.47
µF
C5
TRING
TTIP
+5V
22
14
15
RV+
TV+
TGND
RGND
D10
P6KE
21
T1
(see Table 2)
17
C2
0.1
µF
C1
68
µF
19
RTIP
RRING
RRING
RTIP
20
JP8
R2
4.4
Ω
C3
1
µF
RV+
RCLK
TCLK
RNEG (BPV)
ACLKI
LEN1 [SDI]
LEN2 [SD0]
LLOOP [SCLK]
TAOS [CKLE]
XTALIN
{CS6158/58A: RT}
XTALOUT
{CS6158/58A: NC}
LOS
DPM (AIS)
MODE
13
16
AA
AA
B
B
BB
RTIP
RRING
TRING
Pin 17
Pin 18
9
10
TTIP
RV+
R13 (only included for CS6158/58A)
1k
Ω
(Used only for E1 75
Ω
applications with the CS61534,
CS61535, CS6158, CS61574,
OR CS61577)
CS61534, CS61535,
CS61535A, CS6158,
CS6158A, CS61574,
CS61574A, CS61575,
CS61577, CS61304A,
OR CS61305A
U1:
F
F
E
E
Prototyping
Area
RV+
LEN0 [INT]
RLOOP [CS]
MRING (PCS)
RPOS (RDATA)
TPOS (TDATA)
MTIP (RCODE)
JP6
JP7
JP5
E1: CXT8192
T1: CXT6176
(not included for CS6158/58A)
+
TNEG (TCODE)
U1
R9
200
Ω
R10
200
Ω
T2
(see Table 2)
2:1
GND
(0V)
Change R9 and R10 for E1 operation
Figure 1. Evaluation Board Schematic
LINE INTERFACE EVALUATION BOARD
DS40DB3
35



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