전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

MIPSZ2012D2R2 데이터시트(PDF) 30 Page - STMicroelectronics

부품명 MIPSZ2012D2R2
상세설명  High-performance class-G stereo headphone amplifier with I2C volume control
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

MIPSZ2012D2R2 데이터시트(HTML) 30 Page - STMicroelectronics

Back Button MIPSZ2012D2R2 Datasheet HTML 26Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 27Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 28Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 29Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 30Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 31Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 32Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 33Page - STMicroelectronics MIPSZ2012D2R2 Datasheet HTML 34Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 30 / 48 page
background image
Application information
TS4621B
30/48
Doc ID 022194 Rev 2
4.1.5
Summary of output impedance
4.2
Wake-up and standby time definition
The wake-up time of the TS4621B is guaranteed at 12 ms typical (refer to Chapter 3:
Electrical characteristics). However, since the TS4621B is activated with an I2C bus, the
wake-up start procedure is as follows.
1.
The master sends a start bit.
2.
The master sends the device address.
3.
The slave (TS4621B) answers by an acknowledge bit.
4.
The master sends the register address.
5.
The slave (TS4621B) answers by an acknowledge bit.
6.
The master sends the output mode configuration (CR1).
7.
If the TS4621B was previously in standby mode, the wake-up starts on the falling edge
of the eighth clock signal (SCL) corresponding to the CR1 byte.
8.
After 12 ms (de-pop sequence time), the TS4621B outputs are operational.
The standby time is guaranteed as 100 µs typical (refer to Chapter 3). However, since the
TS4621B is de-activated with an I2C bus, the standby time operates as follows.
1.
The master sends a start bit.
2.
The master sends the device address.
3.
The slave (TS4621B) answers by an acknowledge bit.
4.
The master sends the register address.
5.
The slave (TS4621B) answers by an acknowledge bit.
6.
The master sends the output mode configuration (CR1), which corresponds, in this
case, to standby mode.
7.
The standby time starts on the falling edge of the eighth clock signal (SCL)
corresponding to the CR1 byte.
8.
After 100 µs, the TS4621B is in standby mode.
Table 13.
Summary table for output impedance vs. output mode
SWS
HiZ
HP_EN
Output impedance
Maximum voltage allowed
on output pin
1
0
0
20 to 40
Ω
Less than
± 100 mV
1
0
1
20 to 40
Ω
Less than
± 100 mV
1
1
0
about 10 k
Ω
-0.3 V to AVdd
1
1
1
about 10 k
Ω
-0.3 V to AVdd
0
0
0
20 to 40
Ω
Less than
± 100 mV
0
0
1
Less than 1
Ω
Not applicable
0
1
0
See Figure 18
-1.8 to +1.8 V
0
1
1
See Figure 18
-1.8 to +1.8 V



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com