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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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BQ40Z50-R2 데이터시트(PDF) 10 Page - Texas Instruments |
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BQ40Z50-R2 데이터시트(HTML) 10 Page - Texas Instruments |
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10 / 51 page  10 bq40z50-R2 SLUSCS4 – JUNE 2017 www.ti.com Product Folder Links: bq40z50-R2 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Current Wake Comparator (continued) Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tWAKE Time from application of current to wake interrupt 700 µs tWAKE(SU) Wake comparator startup time 500 1000 µs 7.10 VC1, VC2, VC3, VC4, BAT, PACK Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT K Scaling factor VC1–VSS, VC2–VC1, VC3–VC2, VC4–VC3 0.1980 0.2000 0.2020 — BAT–VSS, PACK–VSS 0.049 0.050 0.051 VREF2 0.490 0.500 0.510 VIN Input voltage range VC1–VSS, VC2–VC1, VC3–VC2, VC4–VC3 –0.2 5 V BAT–VSS, PACK–VSS –0.2 20 ILKG Input leakage current VC1, VC2, VC3, VC4, cell balancing off, cell detach detection off, ADC multiplexer off 1 µA RCB Internal cell balance resistance RDS(ON) for internal FET switch at 2 V < VDS < 4 V 200 Ω ICD Internal cell detach check current VCx > VSS + 0.8 V 30 50 70 µA 7.11 SMBD, SMBC Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIH Input voltage high SMBC, SMBD, VREG = 1.8 V 1.3 V VIL Input voltage low SMBC, SMBD, VREG = 1.8 V 0.8 V VOL Output low voltage SMBC, SMBD, VREG = 1.8 V, IOL = 1.5 mA 0.4 V CIN Input capacitance 5 pF ILKG Input leakage current 1 µA RPD Pulldown resistance 0.7 1.0 1.3 MΩ 7.12 PRES, BTP_INT, DISP Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIH High-level input 1.3 V VIL Low-level input 0.55 V VOH Output voltage high VBAT > 5.5 V, IOH = –0 µA 3.5 V VBAT > 5.5 V, IOH = –10 µA 1.8 VOL Output voltage low IOL = 1.5 mA 0.4 V CIN Input capacitance 5 pF ILKG Input leakage current 1 µA RO Output reverse resistance Between PRES or BTP_INT or DISP and PBI 8 kΩ |
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