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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HT45F75 데이터시트(PDF) 115 Page - Holtek Semiconductor Inc |
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HT45F75 데이터시트(HTML) 115 Page - Holtek Semiconductor Inc |
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115 / 190 page  Rev. 1.10 11� De�e��e� 1�� �01� Rev. 1.10 115 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU Bit3~2 SIMDBC1~SIMDBC0:I2CDebounceTimeSelection 00:Nodebounce 01:2systemclockdebounce 1x:4systemclockdebounce Bit1 SIMEN:SIMControl 0:Disable 1:Enable Thebitistheoverallon/offcontrolfortheSIMinterface.WhentheSIMENbitis clearedtozerotodisabletheSIMinterface,theSDI,SDO,SCKandSCS,orSDA andSCLlineswillbeinafloatingconditionandtheSIMoperatingcurrentwillbe reducedtoaminimumvalue.WhenthebitishightheSIMinterfaceisenabled.The SIMconfigurationoptionmusthavefirstenabledtheSIMinterfaceforthisbittobe effective.IftheSIMisconfiguredtooperateasanSPIinterfaceviatheSIM2~SIM0 bits,thecontentsoftheSPIcontrolregisterswillremainattheprevioussettingswhen theSIMENbitchangesfromlowtohighandshouldthereforebefirstinitialisedby theapplicationprogram.IftheSIMisconfiguredtooperateasanI2Cinterfaceviathe SIM2~SIM0bitsandtheSIMENbitchangesfromlowtohigh,thecontentsoftheI2C controlbitssuchasHTXandTXAKwillremainattheprevioussettingsandshould thereforebefirstinitialisedbytheapplicationprogramwhiletherelevantI2Cflags suchasHCF,HAAS,HBB,SRWandRXAKwillbesettotheirdefaultstates. Bit0 SIMICF:SIMIncompletedFlag 0:SIMincompletedisnotoccurred 1:SIMincompletedisoccurred TheSIMICFbitisdeterminedbySCSpin.WhenSCSpinissethigh,itwillclearthe SPIcounter.Meanwhile,theinterruptisoccurredandtheincompletedflag,SIMICF,is sethigh. SIMC2 Register Bit 7 6 5 4 3 2 1 0 Na�e D7 D� CKPOLB CKEG MLS CSEN WCOL TRF R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~6 D7~D6:Undefinedbit Thisbitcanbereadorwrittenbyusersoftwareprogram. Bit5 CKPOLB:Determinesthebaseconditionoftheclockline 0:TheSCKlinewillbehighwhentheclockisinactive 1:TheSCKlinewillbelowwhentheclockisinactive TheCKPOLBbitdeterminesthebaseconditionoftheclockline,ifthebitishigh, thentheSCKlinewillbelowwhentheclockisinactive.WhentheCKPOLBbitis low,thentheSCKlinewillbehighwhentheclockisinactive. Bit4 CKEG:DeterminesSPISCKactiveclockedgetype CKPOLB=0 0:SCKishighbaselevelanddatacaptureatSCKrisingedge 1:SCKishighbaselevelanddatacaptureatSCKfallingedge CKPOLB=1 0:SCKislowbaselevelanddatacaptureatSCKfallingedge 1:SCKislowbaselevelanddatacaptureatSCKrisingedge TheCKEGandCKPOLBbitsareusedtosetupthewaythattheclocksignaloutputs andinputsdataontheSPIbus.Thesetwobitsmustbeconfiguredbeforedatatransfer isexecutedotherwiseanerroneousclockedgemaybegenerated.TheCKPOLBbit determinesthebaseconditionoftheclockline,ifthebitishigh,thentheSCKline willbelowwhentheclockisinactive.WhentheCKPOLBbitislow,thentheSCK linewillbehighwhentheclockisinactive.TheCKEGbitdeterminesactiveclock edgetypewhichdependsupontheconditionofCKPOLBbit. |
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