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R5F104LED 데이터시트(PDF) 59 Page - Renesas Technology Corp

부품명 R5F104LED
상세설명  True Low Power Platform
PDF  213 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F104LED 데이터시트(HTML) 59 Page - Renesas Technology Corp

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RL78/G14
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
°C)
R01DS0053EJ0330 Rev. 3.30
Page 59 of 208
Aug 12, 2016
Caution
The maximum value of VIH of pins P00, P02 to P04, P10, P11, P13 to P15, P17, P30, P43 to P45, P50 to P55, P71,
P74, P80 to P82, and P142 to P144 is EVDD0, even in the N-ch open-drain mode.
Remark
Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.
(TA = -40 to +85°C, 1.6 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
(3/5)
Items
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input voltage, high
VIH1
P00 to P06, P10 to P17, P30,
P31, P40 to P47, P50 to P57,
P64 to P67, P70 to P77,
P80 to P87, P100 to P102, P110,
P111, P120, P140 to P147
Normal input buffer
0.8 EVDD0
EVDD0
V
VIH2
P01, P03, P04, P10, P14 to P17,
P30, P43, P44, P50, P53 to P55,
P80, P81, P142, P143
TTL input buffer
4.0 V
≤ EVDD0 ≤ 5.5 V
2.2
EVDD0
V
TTL input buffer
3.3 V
≤ EVDD0 < 4.0 V
2.0
EVDD0
V
TTL input buffer
1.6 V
≤ EVDD0 < 3.3 V
1.5
EVDD0
V
VIH3
P20 to P27, P150 to P156
0.7 VDD
VDD
V
VIH4
P60 to P63
0.7 EVDD0
6.0
V
VIH5
P121 to P124, P137, EXCLK, EXCLKS, RESET
0.8 VDD
VDD
V
Input voltage, low
VIL1
P00 to P06, P10 to P17, P30,
P31, P40 to P47, P50 to P57,
P64 to P67, P70 to P77,
P80 to P87, P100 to P102, P110,
P111, P120, P140 to P147
Normal input buffer
0
0.2 EVDD0
V
VIL2
P01, P03, P04, P10, P14 to P17,
P30, P43, P44, P50, P53 to P55,
P80, P81, P142, P143
TTL input buffer
4.0 V
≤ EVDD0 ≤ 5.5 V
00.8
V
TTL input buffer
3.3 V
≤ EVDD0 < 4.0 V
00.5
V
TTL input buffer
1.6 V
≤ EVDD0 < 3.3 V
00.32
V
VIL3
P20 to P27, P150 to P156
0
0.3 VDD
V
VIL4
P60 to P63
0
0.3 EVDD0
V
VIL5
P121 to P124, P137, EXCLK, EXCLKS, RESET
0
0.2 VDD
V



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