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R5F104LED 데이터시트(PDF) 112 Page - Renesas Technology Corp

부품명 R5F104LED
상세설명  True Low Power Platform
PDF  213 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F104LED 데이터시트(HTML) 112 Page - Renesas Technology Corp

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RL78/G14
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
°C)
R01DS0053EJ0330 Rev. 3.30
Page 112 of 208
Aug 12, 2016
Note 1.
The first clock pulse is generated after this period when the start/restart condition is detected.
Note 2.
The maximum value (MAX.) of tHD: DAT is during normal transfer and a wait state is inserted in the ACK (acknowledge)
timing.
Caution
The values in the above table are applied even when bit 2 (PIOR02) in the peripheral I/O redirection register 0
(PIOR0) is 1. At this time, the pin characteristics (IOH1, IOL1, VOH1, VOL1) must satisfy the values in the redirect
destination.
Remark
The maximum value of Cb (communication line capacitance) and the value of Rb (communication line pull-up resistor) at
that time in each mode are as follows.
Standard mode: Cb = 400 pF, Rb = 2.7 k
Ω
(1)
I2C standard mode
(TA = -40 to +85°C, 1.6 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
(2/2)
Parameter
Symbol
Conditions
HS (high-speed main)
mode
LS (low-speed main)
mode
LV (low-voltage main)
mode
Unit
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Data setup time (reception)
tSU: DAT
2.7 V
≤ EVDD0 ≤ 5.5 V
250
250
250
ns
1.8 V
≤ EVDD0 ≤ 5.5 V
250
250
250
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
250
250
250
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—
250
250
ns
Data hold time (transmission)
Note 2
tHD: DAT 2.7 V
≤ EVDD0 ≤ 5.5 V
0
3.45
0
3.45
0
3.45
μs
1.8 V
≤ EVDD0 ≤ 5.5 V
0
3.45
0
3.45
0
3.45
μs
1.7 V
≤ EVDD0 ≤ 5.5 V
0
3.45
0
3.45
0
3.45
μs
1.6 V
≤ EVDD0 ≤ 5.5 V
—
03.4503.45
μs
Setup time of stop condition
tSU: STO 2.7 V
≤ EVDD0 ≤ 5.5 V
4.0
4.0
4.0
μs
1.8 V
≤ EVDD0 ≤ 5.5 V
4.0
4.0
4.0
μs
1.7 V
≤ EVDD0 ≤ 5.5 V
4.0
4.0
4.0
μs
1.6 V
≤ EVDD0 ≤ 5.5 V
—
4.0
4.0
μs
Bus-free time
tBUF
2.7 V
≤ EVDD0 ≤ 5.5 V
4.7
4.7
4.7
μs
1.8 V
≤ EVDD0 ≤ 5.5 V
4.7
4.7
4.7
μs
1.7 V
≤ EVDD0 ≤ 5.5 V
4.7
4.7
4.7
μs
1.6 V
≤ EVDD0 ≤ 5.5 V
—
4.7
4.7
μs



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