WM8912 datasheet(112/129 Pages) CIRRUS

112 / 129 page

WM8912

Production Data

PD, Rev 4.1, February 2013

112

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R90 (5Ah)

Analogue

HP 0

HPL_RMV_SH

ORT

Removes HPOUTL short

0 = HPOUTL short enabled

1 = HPOUTL short removed

For normal operation, this bit should be set as the final

step of the HPL Enable sequence.

HPL_ENA_OU

Enables HPOUTL output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after

the DC offset cancellation has been scheduled.

HPL_ENA_DLY

Enables HPOUTL intermediate stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after

the output signal path has been configured, and before

DC offset cancellation is scheduled. This bit should be

set with at least 20us delay after HPL_ENA.

HPL_ENA

Enables HPOUTL input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set as the first

step of the HPL Enable sequence.

HPR_RMV_SH

ORT

Removes HPOUTR short

0 = HPOUTR short enabled

1 = HPOUTR short removed

For normal operation, this bit should be set as the final

step of the HPR Enable sequence.

HPR_ENA_OU

Enables HPOUTR output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after

the DC offset cancellation has been scheduled.

HPR_ENA_DL

Enables HPOUTR intermediate stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after

the output signal path has been configured, and before

DC offset cancellation is scheduled. This bit should be

set with at least 20us delay after HPR_ENA.

HPR_ENA

Enables HPOUTR input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set as the first

step of the HPR Enable sequence.

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