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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DOC4106 데이터시트(PDF) 10 Page - ATMEL Corporation |
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DOC4106 데이터시트(HTML) 10 Page - ATMEL Corporation |
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10 / 47 page  10 AT8xC51SND1C 4106F–8051–10/02 Internal Pin Structure Notes: 1. For information on resistors value, input/output levels, and drive capability, refer to the Section “DC Characteristics”, page 24. 2. When the TWI controller is enabled, P1,P2,and P3 transistors are disabled allowing pseudo open-drain structure. 3. In Port 2, P 1 transistor is continuously driven when outputting a high level bit address (A15:8). Table 15. Detailed Internal Pin Structure Circuit (1) Type Pins Input TST Input/Output RST Input/Output P1 (2) P2(3) P3 P4 P53:0 Input/Output P0 MCMD MDAT ISP Output ALE SCLK DCLK DOUT DSEL MCLK Input/Output D+ D- V DD VSS P VDD Watchdog Output P 3 VSS N P 1 VDD VDD 2osc Latch Output periods P 2 VDD VSS N P V DD VSS N P VDD D+ D- |
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