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DOC4106 데이터시트(PDF) 40 Page - ATMEL Corporation |
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DOC4106 데이터시트(HTML) 40 Page - ATMEL Corporation |
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40 / 47 page ![]() 40 AT8xC51SND1C 4106F–8051–10/02 Analog to Digital Converter Definition of Symbols Table 52. Analog to Digital Converter Timing Symbol Definitions Characteristics Table 53. Analog-to-Digital Converter AC Characteristics V DD =2.7 to 3.3V, TA =0 to 70°C Notes: 1. A VDD =AVREFP =3.0 V, AVSS =AVREFN = 0 V. ADC is monotonic with no missing code. 2. The differential non-linearity is the difference between the actual step width and the ideal step width (see Figure 27). 3. The integral non-linearity is the peak difference between the center of the actual step and the ideal transfer curve after appropriate adjustment of gain and offset errors (see Figure 27). 4. The offset error is the absolute difference between the straight line, which fits the actual transfer curve (after removing of gain error); and the straight line, which fits the ideal transfer curve (see Figure 27). 5. The gain error is the relative difference in percent between the straight line which fits the actual transfer curve (after removing of offset error); and the straight line, which fits the ideal transfer curve (see Figure 27). Waveforms Figure 26. Analog-to-Digital Converter Internal Waveforms Signals Conditions CClock HHigh E Enable (ADEN bit) L Low S Start Conversion (ADSST bit) Symbol Parameter Min Max Unit T CLCL Clock Period 1.43 µs T EHSH Start-up Time 4 µs T SHSL Conversion Time 11·T CLCL µs DLE Differential non- linearity error(1)( 2) TBD LSB ILE Integral non- linearity error (1)(3) TBD LSB OSE Offset error (1)(4) TBD LSB GE Gain error (1)(5) TBD % ADEN Bit ADSST Bit T EHSH TSHSL CLK TCLCL |
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