PI7C7300 datasheet(3/109 Pages) PERICOM

3 / 109 page

PI7C7300A

3-PORT PCI-TO-PCI BRIDGE

ADVANCE INFORMATION

Page 3 OF 109

09/25/03 Revision 1.09

REVISION HISTORY

Revision

Date

Description

1.01

9/25/01

Corrected the description for bits 4:2 in both

Configuration register 1 and configuration register 2 at offset 40h

(Diagnostic/ Chip Control Register). Bit 4 controls the memory read and

flow-through and bits 3:2 are reserved.

Updated jumper setting/descriptions for the Evaluation Board User’s Manual.

Updated Sheet 1 of the schematics.

Added more description to Primary Reset.

1.02

10/25/01

Replaced Preliminary Information with Advanced Information.

1.03

10/29/01

Corrected Bit 30 of Secondary Status Register to read Received instead of

Signaled

Changed email address from

nolimits@pericom.com to

solutions@pericom.com.

1.04

11/12/01

Corrected PBGA Pin List (S2_AD[28], S1_CLKOUT[7:0] and

S2_CLKOUT[7:0] incorrect)

1.05

12/19/01

Corrected P_AD[27,26] in section 3.2 P_AD[27] should be V8 instead of U8,

and P_AD[26] should be U8 instead of V8.

1.06

06/04/02

TBD references for TDELAY in sections 17.4 and 17.5 removed.

TBD references removed for power consumption and supply current in

section 17.6.

Ambient temperature corrected in section 0 (maximum ratings)

1.07

08/22/02

Revised TSKEW in section 17.4 and 17.5

Added web reference to Thermal Characteristics in section 0

1.08

09/09/03

Corrected part number references from PI7C7300 to PI7C7300A.

1.09

09/25/03

Added back PO signal type description on section 3.1

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